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draft features ? operating range from 5v to 18v baud rate from 2.6 kbaud up to 20 kbaud improved slew rate control acco rding to lin sp ecification 2.0 fully compatible with 3.3v and 5v devices dominant time-out function at transmit data (txd) normal and sleep mode wake-up capability via lin bus (90 s dominant) external wake-up via wake pin (130 s low level) control of external voltage regulator via inh pin very low standby current during sleep mode (10 a) 60v load dump protection at lin pin (42-v power net) wake-up source recognition bus pin short-circuit protected versus gnd and battery lin input current < 3 a if v bat is disconnected overtemperature protection high emc level interference and damage protec tion according to iso/cd 7637 esd hbm 6 kv at lin bus pin and supply vs pin 1. description the ata6661 is a fully integrated lin transceiver according to the lin specification 2.0. it interfaces the lin protocol handler and the physical layer. the device is designed to handle the low-speed data communication in vehicles, e.g., in convenience electronics. improved slope control at the lin bus ensures secure data communication up to 20 kbaud with an rc-osc illator for protocol han dling. in order to comply with the 42-v power net requirements, the bus output is capable of withstand- ing high voltages. sleep mode guaran tees minimal current consumption. lin transceiver ata6661 4729i?auto?12/06
2 4729i?auto?12/06 ata6661 draft figure 1-1. block diagram 2. pin configuration figure 2-1. pinning so8 2 3 wake 4 txd en 1 rxd gnd 5 short circuit and overtemperature protection filter lin vs 7 6 txd time-out timer slew rate control wake up bus timer standby mode control unit ata6661 receiver + - v s v s wake-up timer 8 inh inh 3 4 2 1 lin vs gnd rxd 8 7 6 5 wake en txd figure 2-2. pin description pin symbol function 1 rxd receive data output (open drain) 2 en enables normal mode, when the input is open or low, the device is in sleep mode 3 wake high voltage input for local wake-up request 4 txd transmit data input; active low output (strong pull-down) after a local wake-up request 5 gnd ground 6 lin lin bus line input/output 7 vs battery supply 8inh battery related inhibit output for controlling an exte rnal voltage regulator; active high after a wake-up request
3 4729i?auto?12/06 ata6661 draft 3. functional description 3.1 supply pin (v s ) undervoltage detection is implement ed to disable transmission if v s is falling to a value below 5v to avoid false bus messages. after switching on v s the ic switches to pre-normal mode and inhibit is switched on. the supply curr ent in sleep mode is typically 10 a. 3.2 ground pin (gnd) the ata6661 is neutral on the lin pin in case of a gnd disconnection. it is able to handle a ground shift up to 3v for v s > 9v. 3.3 bus pin (lin) a low-side driver with internal current limitation and thermal shutdown as well as an internal pull-up resistor according to lin specification 2.0 are implemented. the voltage range is from ?27v to +60v. this pin exhibits no reverse current from the lin bus to v s , even in case of a gnd shift or v batt disconnection. the lin receiver thresholds are compatible to the lin protocol specification.the fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope controlled. the output has a short circuit limitation. this is a self adapting current limitation; i.e., during current limitation as the chip temperature increases so the current reduces. 3.4 input pin (txd) this pin is the microcontroller interface to control the state of the lin output. txd is low to bring lin low. if txd is high, the lin output transistor is turned off. in this case, the bus is in recessive mode via the internal pull-up resistor. the txd pin is compatible to a 3.3v and 5v supply. 3.5 txd dominant ti me-out function the txd input has an internal pull-down resistor. an internal timer prevents the bus line from being driven permanently in dominant state. if txd is forced low longer than t dom > 6 ms, the pin lin will be switched off to recessive mode. to reset this mode switch txd to high (>10 s) before switching lin to dominant again. 3.6 output pin (rxd) this pin reports to the microcontroller the state of the lin bus. lin high (recessive) is reported by a high level at rxd, lin low (dominant) is reported by a low voltage at rxd. the output is an open drain, therefore, it is compatible to a 3.3v or 5v power supply. the ac characteristics are defined with a pull-up resistor of 5 k ? to 5v and a load capacitor of 20 pf. the output is short-current protected. in unpowered mode (v s = 0v), rxd is switched off. for esd protection a zener diode is implemented with v z =6.1v.
4 4729i?auto?12/06 ata6661 draft 3.7 enable i nput pin (en) this pin controls the operation mode of the interface. if en = 1, the interface is in normal mode, with the transmission path from txd to lin and from lin to rx both active. if en = 0, the device is switched to sleep mode and no transmission is possible. in sleep mode, the lin bus pin is connected to v s with a weak pull-up current source. the device can transmit only after being woken up (see next section ?inhibit output pin (inh)? ). during sleep mode the device is still supplied from the battery volt age. the supply current is typ- ically 10 a. the pin en provides a pull-down resistor in order to force the transceiver into sleep mode in case the pin is disconnected. 3.8 inhibit output pin (inh) this pin is used to control an external switchable voltage regulator having a wake-up input. the inhibit pin provides an internal switch towards pin v s . if the device is in normal mode, the inhibit high-side switch is turned on and the external voltage regulator is activated. when the device is in sleep mode, the inhibit switch is turn ed off and disables the voltage regulator. a wake-up event on the lin bus or at pin wake will switch the inh pin to the v s level. after a system power-up (v s rises from zero), the pin inh switches automatically to the v s level. the r dson of the high-side output is < 1 k ? . 3.9 wake-up input pin (wake) this pin is a high-voltage input used to wake-up the device from sleep mode. it is usually con- nected to an external switch in the application to generate a local wake-up. if you do not need a local wake-up in your application, connect pin wake directly to pin vs. a pull-up current source with typically ?10 a is implemented. the voltage threshold for a wake-up signal is 3v below the vs voltage with an output current of typical ?3 a. wake-up events from sleep mode: lin bus en pin wake pin figure 3-1 on page 6 , figure 3-2 and figure 3-3 on page 7 show details of wake-up operations.
5 4729i?auto?12/06 ata6661 draft 3.10 mode of operation 1. normal mode this is the normal transmitting and rece iving mode. all features are available. 2. sleep mode in this mode the transmission path is disabled and the device is in low power mode. supply current from v batt is typically 10 a. a wake-up signal from the lin bus or via pin wake will be detected and swit ches the device to pre- normal mode. if en, then switches to high, normal mo de is activated. input debounce ti mers at pin wake (t wake ), lin (t bus ) and en (t sleep ,t nom ) prevent unwanted wake-up events due to auto- motive transients or emi. in sleep mode the inh pin is floating. the internal termination between pin lin and pin v s is disabled to minimize the power dissipation in case pin lin is short-circuited to gnd. only a weak pull-up current (typical 10 a) between pin lin and pin v s is present. 3. pre-normal mode at system power-up, the device automatically switches to pre-normal mode. it switches the inh pin to a high state, to the v s level. the microcontro ller of the application will then confirm the normal mode by setting the en pin to high. 4. unpowered mode in this mode the lin transceiver is disabled. data communication is switched off. if v s is higher than v sth undervoltage threshold, the ic mode change from unpowered to pre-normal mode. 3.11 remote wake-up via dominant bus state a falling edge at pin lin, followed by a dominant bus level maintained for a certain time period (t bus ), results in a remote wake-up request. the device switches to pre-normal mode. pin inh is activated (switches to v s ) and the internal termination resistor is switched on. the remote wake-up request is indicated by a low level at pin rxd to inte rrupt the microcontroller (see fig- ure 3-2 on page 7 ). the voltage threshold for a wake-up si gnal is 3v below the vs voltage with an output current of typical ?3 a. 3.12 local wake-up via pin wake a falling edge at pin wake, follo wed by a low level maintained for a certain time period (t wake ), results in a local wake-up request. the extra long wake-up time (t wake ) ensures that no tran- sient, according to iso7637, creates a wake-up. the device switches to pre-normal mode. pin inh is activated (switches to v s ) and the internal termination resistor is switched on. the local wake-up request is indicated by a low level at pin rxd to interrupt the microcontroller and a strong pull-down at pin txd (see figure 3-3 on page 7 ). 3.13 wake-up source recognition the device can distinguis h between a local wake-up request (pin wake) and a remote wake-up request (dominant lin bus). the wake-up source can be read on pin txd in pre-normal mode. if an external pull-up re sistor (typically 5 k ? ) on pin txd to the power supply of the microcontroller has been added, a high level indicates a remote wake-up request (weak pull-down at pin txd) and a low level indicates a local wake-up request (strong pull-down at pin txd). the wake-up request flag (signalled on pin rxd) as well as the wake-up source flag (signalled on pin txd) are reset immediately, if the microcontroller sets pin en to high (see figure 3-2 on page 7 and figure 3-3 ).
6 4729i?auto?12/06 ata6661 draft figure 3-1. mode of operation 3.14 fail-safe features there are now reverse currents < 3 a at pin lin during loss of v bat or gnd. optimal behavior for bus systems where some slave nodes supplied from battery or ignition. pin en provides pull-down resistor to force the transceiver into sleep mode if en is disconnected. pin rxd is set floating if v bat is disconnected. pin txd provides a pull-down resistor to pr ovide a static low if txd is disconnected. the lin output driver has a current limitation and if the junction temperature t j exceeds the thermal shut-down temperature t off the output driver switches off. the implemented hysteresis t hys enables the lin output again after the temperature has been decreased. 3.15 physical layer compatibility since the lin physical layer is independent from higher lin layers (e.g. lin protocol layer), all nodes with a lin physical layer according to th is revision can be mixed with lin physical layer nodes, which are according to older versions (i.e. lin 1.0, lin 1.1, lin 1.2, lin 1.3), without any restrictions. a higher ratio of nodes according to this lin physical layer specification or the one of revision 2.0 will result in a higher transmi ssion reliability. a: v s > 5v b: v s < 4v c: bus wake-up event d: wake-up from wake switch en = 1 en = 1 en = 0 unpowered mode v batt = 0v normal mode inh: high (inh hs switch on) communication: on sleep mode inh: high impedance (inh hs switch off) communication: off pre-normal mode inh: high (inh internal high side switch on) communication: off a b b c d b local wake-up event go to sleep command
7 4729i?auto?12/06 ata6661 draft figure 3-2. lin wake-up waveform diagram figure 3-3. lin wake-up from wake-up switch regulator wake-up time delay microcontroller start-up time delay low or floating inh lin bus high node in sleep state node in operation en high high or floating en rxd external voltage regulator low on state bus wake-up filtering time t bus off state regulator wake-up time delay microcontroller start-up time delay high high low weak pull-down node in sleep state node in operation en high high or floating txd weak pull-down resistor txd strong pull-down low or floating inh wake pin en rxd txd voltage regulator on state off state wake filtering time t wake state change
8 4729i?auto?12/06 ata6661 draft 4. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability . parameters symbol min. typ. max. unit v s - continuous supply voltage ?0.3 +40 v wake dc and transient voltage (with 33 k ? serial resistor) - transient voltage due to iso7637 (coupling 1 nf) ?40 ?150 +40 +100 v v logic pins (rxd, txd, en) ?0.3 +6 v lin - dc voltage - transient voltage due to iso7637 (coupling 1 nf) ?40 ?150 +60 +100 v v inh - dc voltage ?0.3 +40 v esd (din en 61000-4-2) according lin emc test specification v1.3 - pin vs, lin - pin wake (with 33 k ? serial resistor) ?6000 ?5000 +6000 +5000 v v esd s5.1 - all pins ?3000 +3000 v cdm esd stm 5.3.1-1999 - all pins fcdm esd stm 5.3.1- all pins mm jedec a115a - all pins ?500 ?1000 ?200 +500 +1000 +200 v v v junction temperature t j ?40 +150 c storage temperature t stg ?55 +150 c operating ambient temperature t amb ?40 +125 c thermal shutdown t off 150 165 180 c thermal shutdown hysteresis t hys 5 1020c 5. thermal resistance parameters symbol value unit thermal resistance junction ambient r thja 160 k/w
9 4729i?auto?12/06 ata6661 draft 6. electrical characteristics 5v < v s < 18v, t amb = ?40c to +125c no. parameters test conditions pin symbol min. typ. max. unit type* 1v s pin 1.1 nominal dc voltage range 7 v s 5 13.5 18 v a 1.2 supply current in sleep mode sleep mode v lin > v batt ? 0.5v v batt < 14v 7i vsstby 10 20 a a 1.3 supply current in normal mode bus recessive 7 i vsrec 1.6 3 ma a 1.4 bus dominant total bus load > 500 ? 7i vsdom 1.6 3 ma a 1.5 v s undervoltage threshold v sth 44.65 v a 1.6 v s undervoltage threshold hysteresis 7v sth_hys 0.2 v a 2 rxd output pin (open drain) 2.1 low level input current normal mode v lin = 0v, v rxd = 0.4v 1i rxdl 258maa 2.2 rxd saturation voltage 5 k ? pull-up resistor to 5v 1 vsat rxd 0.4 v a 2.3 high level leakage current normal mode v lin = v bat , v rxd = 5v 1i rxdh ?3 +3 a a 2.4 esd zener diode i rxd = 100 a 1 vz rxd 6.1 8.6 v a 3 txd input pin 3.1 low level voltage input 4 v txdl ?0.3 +0.8 v a 3.2 high level voltage input 4 v txdh 27va 3.3 pull-down resistor v txd = 5v 4 r txd 125 250 600 k ? a 3.4 low level leakage current v txd = 0v 4 i txd ?3 +3 a a 3.5 low-level input current at local wake-up request pre-normal mode v lin = v bat ; v wake = 0v 4i txdwake 258maa 4en input pin 4.1 low level voltage input 2 v enl ?0.3 +0.8 v a 4.2 high level voltage input 2 v enh 27va 4.3 pull-down resistor v en = 5v 2 r en 125 250 600 k ? a 4.4 low level input current v en = 0v 2 i en ?3 +3 a a 4.5 enable negative slope for go to sleep negative slope v en =2vto0.8v 2slope en 60 s a 5 inh output pin 5.1 high level voltage normal mode i inh = ?200 a 8v inhh v s ? 0.8 v s va 5.2 high level leakage current sleep mode v inh = 27v, v batt = 27v 8i inhl ?3 +3 a a 6 wake pin 6.1 high level input voltage 3 v wakeh v s ? 1v v s + 0.3v va 6.2 low level input voltage i wake = typically ?3 a 3 v wakel ?27v v s ? 3v va *) type means: a = 100% tested, b = 100% correlation tested, c = characterized on samples, d = design parameter
10 4729i?auto?12/06 ata6661 draft 6.3 wake pull-up current v s < 27v 3 i wake ?30 ?10 a a 6.4 high level leakage current v s = 27v, v wake = 27v 3 i wake ?5 +5 a a 7 lin bus driver 7.1 driver recessive output voltage r load = 500 ? /1 k ? 6v busrec 0.9 v s v s va 7.2 driver dominant voltage v busdom_drv_losup v vs = 7v, r load = 500 ? 6v _losup 1.2 v a 7.3 driver dominant voltage v busdom_drv_hisup v vs = 18v, r load = 500 ? 6v _hisup 2va 7.4 driver dominant voltage v busdom_drv_losup v vs = 7v, r load = 1000 ? 6v _losup_1k 0.6 v a 7.5 driver dominant voltage v busdom_drv_hisup v vs = 18v, r load = 1000 ? 6v _hisup_1k_ 0.8 v a 7.6 pull-up resistor to v s the serial diode is mandatory 6r lin 20 30 60 k ? a 7.7 self-adapting current limitation v bus = v bat_max t j = 125c t j = 27c t j = ?40c 6i bus_lim 52 100 150 110 170 230 ma ma ma a 7.8 input leakage current at the receiver, inclusive pull-up resistor as specified input leakage current driver off v bus = 0v, v batt = 12v 6i bus_pas_dom ?1 ma a 7.9 leakage current lin recessive driver off 8v < v bat < 18v 8v < v bus < 18v v bus v bat 6i bus_pas_rec 15 20 a a 7.10 leakage current at ground loss, control unit disconnected from ground, loss of local ground must not affect communication in the residual network gnd device = v s v bat =12v 0v < v bus < 18v 6i bus_no_gnd ?10 +0.5 +10 a a 7.11 node has to sustain the current that can flow under this condition, bus must remain operational under this condition v bat disconnected v sup_device = gnd 0v < v bus < 18v 6i bus 0.5 3 a a 8 lin bus receiver 8.1 center of receiver threshold v bus_cnt = (v th_dom + v th_rec )/2 6v bus_cnt 0.475 v s 0.5 v s 0.525 v s va 8.2 receiver dominant state v en = 5v 6 v busdom ?27 0.4 v s va 8.3 receiver recessive state v en = 5v 6 v busrec 0.6 v s 40 v a 8.4 receiver input hysteresis v hys = v th_rec ? v th_dom 6v bushys 0.028 v s 0.1 v s 0.175 v s va 8.5 wake detection lin high level input voltage 6v linh v s ? 1v v s + 0.3v va 6. electrical characteristics (continued) 5v < v s < 18v, t amb = ?40c to +125c no. parameters test conditions pin symbol min. typ. max. unit type* *) type means: a = 100% tested, b = 100% correlation tested, c = characterized on samples, d = design parameter
11 4729i?auto?12/06 ata6661 draft 8.6 wake detection lin low level input voltage i lin = typically ?3 a 6 v linl ?27v v s ? 3v va 8.7 lin pull-up current v s < 27v 6 i lin ?30 ?10 a a 9 internal timers 9.1 dominant time for wake-up via lin bus v lin = 0v 6 t bus 30 90 150 s a 9.2 time of low pulse for wake-up via pin wake v wake = 0v 3 t wake 60 130 200 s a 9.3 time delay for mode change from pre-normal mode to normal mode via pin en v en = 5v 2 t norm 21015sa 9.4 time delay for mode change from normal mode into sleep mode via pin en v en = 0v 2 t sleep 21012sa 9.5 txd dominant time out timer v txd = 0v 4 t dom 6920msa 9.6 power-up delay between v s = 5v until inh switches to high v vs = 5v t vs 200 s a 10 lin bus driver (see figure 6-1 on page 12 ) bus load conditions: load1 small 1 nf 1 k ? , load2 big 10 nf 500 ? , r rxd = 5 k ? , c rxd = 20 pf; the following two rows specifies the timing parameters for proper operation at 20.0 kbit/s. 10.1 duty cycle 1 th rec(max) = 0.744 v s th dom(max) = 0.581 v s v s = 7.0v to 18v t bit = 50 s d1 = t bus_rec(min) /(2 t bit ) 6 d1 0.396 a 10.2 duty cycle 1 th rec(min) = 0.422 v s th dom(min) = 0.284 v s v s = 7.0v to 18v t bit = 50 s d2 = t bus_rec(max) /(2 t bit ) 6 d2 0.581 a 10.3 slope time falling and rising edge at lin load1/load2 v s = 7.3v to 18v 6 t slope_fall t slope_rise 3.5 22.5 s a 10.4 symmetry of rising and falling edge vs = 7.3v t sym = t slope_fall ? t slope_rise t sym ?4 +4 s a 11 receiver electrical ac parameters of the lin physical layer lin receiver, rxd load conditions (c rxd ): 20 pf, r pull-up = 5 k ? 11.1 propagation delay of receiver (see figure 6-1 on page 12 ) t rec_pd = max(t rx_pdr , t rx_pdf )t rx_pd 6sa 11.2 symmetry of receiver propagation delay rising edge minus falling edge t rx_sym = t rx_pdr ? t rx_pdf t rx_sym ?2 +2 s a 6. electrical characteristics (continued) 5v < v s < 18v, t amb = ?40c to +125c no. parameters test conditions pin symbol min. typ. max. unit type* *) type means: a = 100% tested, b = 100% correlation tested, c = characterized on samples, d = design parameter
12 4729i?auto?12/06 ata6661 draft figure 6-1. definition of bus timing parameter txd (input to transmitting node) vs (transceiver supply of transmitting node) rxd (output of receiving node1) rxd (output of receiving node2) lin bus signal thresholds of receiving node1 thresholds of receiving node2 t bus_rec(max) t rx_pdr(1) t rx_pdf(2) t rx_pdr(2) t rx_pdf(1) t bus_dom(min) t bus_dom(max) th rec(max) th dom(max) th rec(min) th dom(min) t bus_rec(min) t bit t bit t bit
13 4729i?auto?12/06 ata6661 draft figure 6-2. application circuit v s v s inh 8 en 2 rxd 12v + + 5v vbattery sci 5 k ? 1k 100 nf 220 pf 22 f ata6661 33 k ? 10 k ? 1 short circuit and overtemperature protection control unit slew rate control wake-up bus timer filter master node pull-up wake-up timer txd time-out timer standby mode receiver wake 3 txd microcontroller io vdd external switch 4 5 gnd 6 7 vs lin lin sub bus
14 4729i?auto?12/06 ata6661 draft 8. package information 7. ordering information extended type number package remarks ata6661-taqj so8 lin transceiver, pb-free, taped and reeled ATA6661-TAPJ so8 lin transceiver, pb-free, taped and reeled technical drawings according to din specifications package so8 dimensions in mm 5.00 4.85 0.4 1.27 3.81 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 85 14
15 4729i?auto?12/06 ata6661 draft 9. revision history please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. revision no. history 4729i-auto-12/06 put datasheet in a new template section 3.5 ?txd dominant time-out function? changed section 7 ?ordering information? on page 14 changed 4729h-auto-10/06 put datasheet in a new template pb-free logo on page 1 deleted features on page 1 changed section 3-10 ?mode of operation? on page 5 changed figure 3-1 ?mode of operation? on page 6 changed section 3.15 ?physical layer compatibility? on page 6 added section 6 ?electrical characteristics? number 4.5 on page 9 added section 6 ?electrical characteristics? number 9.5 on page 11 changed section 6 ?electrical characteristics? number 10.3 and 10.4 on page 11 added figure 6-2 ?application circuit? on page 12 changed 4729g-auto-10/05 pb-free logo on page 1 added table ?ordering information? on page 13 changed 4729f-auto-05/05 section 2.14 ?fail-safe features? on page 5 changed figure 2.2 ?lin wake-up waveform diagram? on page 6 changed table ?absolute maximum ratings? on page 7 changed table ?electrical characteristics?: ro ws: 7.1, 7.2, 7.4, 8.5, 9.3 and 9.5 changed 4729e-auto-01/05 put datasheet in a new template table ?ordering information? on page 13 changed 4729d-auto-10/04 put datasheet into new template section ?features? on page 1 changed figure 1 ?block diagram? on page 1 changed section ?bus pin (lin)? on page 2 changed section ?tx dominant time-out function? on page 3 changed section ?output pin (rxd)? on page 3 changed section ?inhibit output pin (inh)? on page 3 changed section ?wake-up input pin (wake)? on page 3 changed section ?remote wake-up via domi nant bus state? on page 4 changed section ?fail-safe features? added table ?absolute maximum ratings? on page 7 changed table ?electrical characteristics?: rows: 1.3, 1.4, 1.5, 6.2, 7.9, 7.10, 7.11 and 9.3 changed table ?electrical characteristics?: rows: 2.4, 8.5, 8.6 and 8.7 figure 7 ?application circuit? on page 12 changed 4729c-auto-06/04 table ?ordering information? on page 13 changed
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